(China (Mainland))
Product Summary
The X28HC256EMB-90 is a second generation high performance CMOS 32k x 8 EEPROM. The X28HC256EMB-90 is fabricated with Intersil’s proprietary, textured poly floating gate technology, providing a highly reliable 5V only nonvolatile memory. The X28HC256EMB-90 supports a 128-byte page write operation, effectively providing a 24μs/byte write cycle, and enabling the entire memory to be typically rewritten in less than 0.8 seconds. The X28HC256EMB-90 also features DATA Polling and Toggle Bit Polling, two methods of providing early end of write detection. It also supports the JEDEC standard Software Data Protection feature for protecting against inadvertent writes during power-up and power-down.
Parametrics
X28HC256EMB-90 absolute maximum ratings: (1)Temperature under bias: -10℃ to +85℃; (2)Voltage on any Pin with respect to VSS: -1V to +7V; (3)DC output current: 10mA.
Features
X28HC256EMB-90 features: (1)Access time: 70ns; (2)Simple byte and page write: Single 5V supply; No external high voltages or VP-P control circuits; Self-timed; No erase before write; No complex programming algorithms; No overerase problem; (3)Low power CMOS: Active: 60mA; Standby: 500μA; (4)Software data protection: Protects data against system level inadvertent writes; (5)High speed page write capability; (6)Highly reliable Direct WriteTM cell: Endurance: 1,000,000 cycles; Data retention: 100 years; (7)Early end of write detection: DATA polling; Toggle bit polling; (8)Pb-free plus anneal available (RoHS compliant).
Diagrams
 |
 X28HC |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
X28HC256 |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
X28HC256J-12 |
Intersil |
IC EEPROM 32K X 8 32PLCC |
Data Sheet |
Negotiable |
|
||||
|
X28HC256J-12T1 |
Intersil |
IC EEPROM 32KX8 5V CMOS 32-PLCC |
Data Sheet |
Negotiable |
|
||||
|
X28HC256J-15 |
Intersil |
IC EEPROM 32K X 8 32PLCC |
Data Sheet |
Negotiable |
|
||||
|
X28HC256J-15T1 |
Intersil |
IC EEPROM 32KX8 5V CMOS 32-PLCC |
Data Sheet |
Negotiable |
|
||||
