Product Summary
The XC95108-10PC84I is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. The XC95108-10PC84I is comprised of six 36V18 Function Blocks, providing 2,400 usable gates with propagation delays of 7.5 ns. See Figure 2 for the architecture overview.
Parametrics
XC95108-10PC84I absolute maximum ratings: (1)Supply voltage relative to GND, VCC: -0.5 to 7.0 V; (2)DC input voltage relative to GND, VIN: -0.5 to VCC + 0.5 V; (3)Voltage applied to 3-state output with respect to GND, VTS: -0.5 to VCC + 0.5 V; (4)Storage temperature, TSTG: -65 to +150℃; (5)Max soldering temperature (10 s @ 1/16 in = 1.5 mm), TSOL: +260℃.
Features
XC95108-10PC84I features: (1)7.5 ns pin-to-pin logic delays on all pins; (2)fCNT to 125 MHz; (3)108 macrocells with 2400 usable gates; (4)Up to 108 user I/O pins; (5)5 V in-system programmable (ISP): Endurance of 10,000 program/erase cycles; Program/erase over full commercial voltage and temperature range; (6)Enhanced pin-locking architecture; (7)Flexible 36V18 Function Block: 90 product terms drive any or all of 18 macrocells within Function Block; Global and product term clocks, output enables, set and reset signals; (8)Extensive IEEE Std 1149.1 boundary-scan (JTAG) support; (9)Programmable power reduction mode in each macrocell; (10)Slew rate control on individual outputs; (11)User programmable ground pin capability; (12)Extended pattern security features for design protection; (13)High-drive 24 mA outputs; (14)3.3 V or 5 V I/O capability; (15)Advanced CMOS 5V FastFLASH technology; (16)Supports parallel programming of more than one XC9500 concurrently; (17)Available in 84-pin PLCC, 100-pin PQFP, 100-pin TQFP and 160-pin PQFP packages.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||||||
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XC95108-10PC84I |
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Data Sheet |
Negotiable |
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